1. Field of the Invention
The present invention relates to an alignment method and an apparatus for determining a model equation expressing the regularity of arrangement of a plurality of processing areas on a wafer by use with, e.g., a statistical technique in order to predict an arrangement coordinate value of each of the processing areas prior to aligning each of processing areas with a predetermined position and more particularly to an alignment method and an apparatus suitable for aligning a pattern of a mask or a reticle with each of processing areas (shot areas) accurately.
2. Related Background Art
In the photolithography process for manufacturing semiconductor devices, liquid crystal display devices or the like, there are used projection exposure apparatuses, which project a pattern of a mask or a reticle (hereinafter referred to as the reticle) to each of shot areas on a sensitive substrate via a projection optical system. Recently,                step and repeat type exposure apparatuses, e.g., reduction projection type exposure apparatuses (stepper) have been widely used, wherein the sensitive substrate is disposed on a two-dimensionally movable stage and the image of the pattern of the reticle is exposed on each of the shot areas on the sensitive substrate successively and repeatedly while the sensitive substrate is shifted (stepping) by the stage.        
For example, in forming a semiconductor device, a plurality of circuit patterns are piled one over another on the sensitive substrate with a sensitive material applied thereon. Therefore, when exposing the circuit pattern on the first layer and thereafter, the pattern image of the reticle for the next exposure needs to be superposed accurately on the circuit pattern already formed on the wafer. That is, the wafer needs to be aligned with the reticle accurately. The alignment method for the wafer in the conventional stepper or the like is as follows (e.g., U.S. Pat. Nos. 4,780,617 and 4,833,621).
A plurality of shot area are arranged regularly on the wafer based on the predetermined alignment coordinate values and provided with the respective chip patterns having marks for alignment (alignment marks). However, when superposing another pattern on the pattern formed previously, even though the wafer is subjected to the stepping operation based on the predetermined arrangement coordinate values, sufficient alignment accuracy cannot be necessarily obtained owing to the following factors.
(1) the residual rotation error of the wafer: Θ
(2) the rectangular degree error of the stage coordinate system (or shot arrangement): W
(3) the linear expansion or contraction of the wafer: Rx, Ry 
(4) the offset (parallel movement) of the wafer (center position): OX, OY 
As these four error amounts can be expressed by six parameters, the transformation matrix A of 2 lines×2 rows including elements expressed by four parameters among those and the transformation matrix 0 of 2 lines×1 row including elements of the offset (parallel movement) OX, OY are considered. And, the arrangement coordinate value upon the design (DXn, DYn)(n=0, 1, 2, . . . ) of the shot areas on the wafer and the arrangement coordinate values (FXn, FYn) for the actual alignment by the step and repeat method are expressed by use with the transformation matrices A and O as follows:                               [                                                                      F                  Xn                                                                                                      F                  Yn                                                              ]                =                              A            ⁡                          [                                                                                          D                      Xn                                                                                                                                  D                      Yn                                                                                  ]                                +          O                                    (        1        )            
At this time, the least squares method is used to determine the transformation matrices A and O, and                the deviation between the arrangement coordinate value (FMXn, FMYn) actually measured from each of shot areas selected from the plurality of shot areas and the arrangement coordinate value upon calculation (FXn, FYn) is calculated for each of the corresponding selected shot areas. Conventionally, on the basis of the determined transformation matrices A, O and the alignment coordinate upon the design (DXn, DYn), the arrangement value upon calculation (FXn, FYn) for the actual alignment position is calculated and the positions of shot areas on the wafer are determined based on the calculated arrangement coordinate value (FXn, FYn)        
However, even though the wafer is positioned in accordance with the calculated alignment coordinate value upon calculation (FXn, FYn), sufficient alignment accuracy cannot be necessarily obtained owing to the following factors.
(1) the residual rotation errors of the circuit patterns (chip pattern) of the shot areas on the wafer: θ
(2) the rectangular degree error of the coordinate system (chip pattern) on the wafer: w
(3) the linear expansion or contraction of the chip pattern in the two rectangular directions: rx, ry.
These are caused by the deviation or rotation of the reticle from a predetermined position, the projection magnification error of the projection optical system or the distortion of the projection optical system when the chip pattern is first (first layer) printed on each shot area on the wafer. Furthermore, these factors are changed by the distortion occuring at the time of processing the wafer.
Further, there is presented such a disadvantage that when a reticle is rotated or translated, a pattern image of the reticle and a chip pattern on a wafer cannot be precisely aligned with each other. Accordingly, as proposed in U.S. Pat. No. 4,699,515 or U.S. Pat. No. 4,052,603, two marks on sides of a circuit pattern on a reticle are detected so as to obtain a rotational error, and the reticle or a wafer is rotated so as to make the rotational error zero. Further, as proposed in U.S. patent application Ser. No. 093,725 (Jul. 20, 1993), marks on a reticle are transferred onto a plurality of partial areas on a wafer, respectively, and latent images formed on the partial areas are detected so as to obtain positional deviations which are then added to arrangement coordinates (FXn, FYn) in order to position the wafer. However, the former method offers such a problem that it is difficult to drive the rotational error into a value below a predetermined allowable value due to an error in depiction of the marks on the reticle. Further, the latter method offers such a problem that exposure operation for forming the latent images greatly lowers the through-put.
Further, another disadvantage occurs such that the pattern image of the reticle cannot precisely be aligned with the chip pattern on the wafer over their entire surfaces due to an error in the projection magnification of the projection system. Accordingly, as proposed, for example, in U.S. Pat. No. 4,629,313, projected positions of a plurality of marks on a reticle exclusively for measurement are detected in order to obtain a projection magnification of a projection optical system. However, there is present a problem in which this method has to use the reticle exclusively for measurement so that a relatively long time is required for the measurement of the magnification, causing the through-put to be greatly lowered, and further, it is difficult to precisely measure the projection magnification due to an error in the depiction of the reticle.
When the circuit patterns of the second and subsequent layers are projection-exposed on the wafers by the use of a projection exposure apparatus such as a stepper, as stated above, it is required to perform alignment of each shot area in which the circuit pattern has already formed on the wafer with a pattern image of the reticle serving as a mask to be exposed, namely alignment between the wafer and the reticle, with high accuracy. An alignment apparatus for executing such alignment is mainly comprised of an alignment sensor for generating a photoelectric signal by detecting the position of an alignment mark (wafer mark) attached in each shot area on the wafer, a signal processing system for obtaining an amount of deviation of said wafer mark from its original position by processing said photoelectric signal, and a positioning mechanism for compensating the position of the wafer or the reticle based on the obtained amount of deviation.
As a method for such alignment sensor, there are a TTR (through-the-reticle) method for observing (detecting) an alignment mark (a reticle mark) on the reticle at the same time through a wafer mark and a projection optical system, a TTL (through-the-lens) method for not detecting the reticle mark, but detecting the wafer mark only through the projection optical system, and an off-axis method for detecting the wafer mark only through a detection system which is separated from the projection optical system.
Among these methods, since the TTR method or the TTL method is designed to detect the wafer mark through the projection optical system, and which projection optical system is designed to have the most satisfactory color aberration for an exposure light, a desired light is a laser beam (monochromatic light) or a quasi monochromatic light having a wavelength range on the same level as that of the exposure light (e.g., bright line spectrum of g-ray, i-ray, etc., of a mercury-arc lamp). Accordingly, in an alignment sensor of the TTR method or the TTL method, a sensor using a laser beam as detection light is mainly used, such as a laser step alignment (hereinafter called the “LSA”) sensor which relatively scans a wafer mark in a dot-array pattern form and a laser beam to be converged in a slit form and detects a diffracted light generated in a predetermined direction so as to detect the position of said wafer mark, or a laser interferometric alignment (hereinafter called the “LIA”) sensor which irradiates laser beams from a plurality of directions to a wafer mark in the form of a diffraction grating so as to detect the position of said wafer mark from a phase of the interference lights of a plurality of diffracted lights emitted to the same direction from said wafer mark. An alignment sensor of the LSA method and that of the LIA method are disclosed, for example, in U.S. Pat. No. 5,151,750.
On the other hand, in the off-axis method, since there is no limitation by the projection optical system, any type of illumination light to the wafer mark can be adopted. As a result, the above-mentioned LSA alignment sensor or the LIA alignment sensor can be used. Further, for the off-axis method, an alignment sensor of an image processing system (hereinafter called the FIA (Field Image Alignment) system) is used, by which a wafer mark is illuminated having an illumination light (broad band light) with a predetermined band range (e.g., range of 200 nm or around) from a halogen lamp, or the like, and an image pick-up signal obtained by image-picking the image of said wafer mark is image-processed to obtain the position of the wafer mark.
As a method for performing alignment in each shot area on the wafer by using any of the above-mentioned alignment apparatuses, an alignment method disclosed in the above-mentioned U.S. Pat. No. 4,780,617 is proposed.
Out of the alignment sensors as mentioned above, an alignment sensor of the off-axis system and the FIA method uses an illumination light having a wide band range so that said sensor is hardly influenced from a thin film interference on a photoresist layer which is coated on the wafer and is hardly influenced from asymmetric characteristics of the wafer mark conveniently. However, according to the off-axis method, a measured position and an exposure position are separated comparatively widely, which results in a poor through-put (the number of wafers processed per unit time).
On the other hand, when an alignment sensor of the TTL system and the LIA method is used, a moving distance between the measured position and the exposure position is short (the moving distance in some cases is substantially zero) because of the TTL system, which is advantageous in terms of a through-put. However, when an alignment sensor of the LIA method or the LSA method is used, errors may be generated in measurement results of a scaling (a linear expansion or contraction of the entire wafer) and a magnification of a chip pattern within a shot area, under the influence of the asymmetric configuration generated on the surface of the wafer mark formed, for example, by aluminum vapor deposition on the wafer. Moreover, since the used light is a monochromatic laser beam, the sensor may be influenced by the thin film interference of the photoresist. There is a possibility that extent of these influences differ from one another for each lot due to non-uniformity of the process so that it is inconveniently difficult to compensate these influences only with the constants obtained in advance.
Particularly, the alignment method disclosed in the above-mentioned U.S. Pat. No. 4,780,617 is a method for improving both an alignment accuracy and a through-put (the number of wafers processed per unit time) so that it is desired to use an alignment sensor which is very satisfactory in terms of both the accuracy and the through-put. In addition, it is required not only to improve the alignment accuracy in each shot area, but also to enhance a superposition accuracy within each shot area.